Senior Post-Silicon DDR Memory Validation Engineer

A technology firm in Malaysia, Penang, is seeking a Senior Electrical Test and Debug Engineer. This role involves providing technical leadership in DDR interface feature validation and debugging issues within the memory subsystem of new processors. Ideal candidates will have strong hands-on experience with electrical test plans, excellent communication skills, and familiarity with lab equipment like oscilloscopes. Knowledge of scripting in Python or similar languages is a plus, alongside experience in Linux environments.
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