Location
singapore
Job Type
Full-time
Posted
July 09, 2026
Job Description
We Are In for jobs that impact everyone's life. Build the future nobody’s dreamed of yet... are you ready to rethink the impossible? As a Mixed Signal Verification Engineer on our Research & Development team, you'll have the opportunity to merge creativity with your technical expertise by shaping the future of technology, driving groundbreaking projects, and bringing new ideas to life. Are you in?
Your Role Key responsibilities in your new role- Contribute to verification in complex projects: understanding requirements, actively supporting the definition & review of the verification plan, setting up verification metrics in digital, developing test cases and ensuring report compliance.
- Responsibilities involve the coordination of verification activities for given projects.
- Apply methodologies (e.g. Universal Verification Methodology (UVM) and System Verilog) and execute tests in these environments on RTL on IP, and Sub-System.
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